The sources for the DE0 nano Quartus project can be downloaded from here.
The Quartus project should compile with 13.1 or above. The rom0 memory is set to load "both.hex" which is BASIC2 and a slightly hacked version of OS1.2 (the main difference is to skip checking interrupts for the user via).
The assembler sources are in the /software directory and can be compiled using the cmp.sh and cmpOS.sh scripts. You'll need cc65 version V2.14.0 or later
Saturday 29 March 2014
Friday 28 March 2014
FPGA/BBC Now boots and runs basic
Well I've got a bit further on with the FPGA project today. I managed to get it to boot to BASIC and run long enough to type in simple test programs.
There were a few problems of my own that I had to overcome...such as spotting some address selection logic that I'd commented out for some unknown reason and some dodginess with my SPI slave implementation (which is how I'm sending keystrokes to the FPGA).
The real stumper though was seems to be an apparent bug in the T65 6502 core I got from open cores. It seems that during a PLP instruction the disable interrupt flag randomly got changed to off (i.e. interrupts enabled) even when the P register had it set before the PLP and the value on the stack had it set.
I made a small change to the core to ignore the IRQ_n_o while LDP (load P from ALU signal) is high,during which time it is unstable.
... t65.vhd line 542 on
-- DOM HACK : PLP causes Flag_I to follow ALU_Q during LDP, ignore until
-- LDP is low, otherwise get spurious irq cycles during PLP even if
-- I is set before and after PLP!
elsif IRQ_n_o = '0' and P(Flag_I) = '0' and LDP = '0' then
IRQCycle <= '1';
end if;
There were a few problems of my own that I had to overcome...such as spotting some address selection logic that I'd commented out for some unknown reason and some dodginess with my SPI slave implementation (which is how I'm sending keystrokes to the FPGA).
The real stumper though was seems to be an apparent bug in the T65 6502 core I got from open cores. It seems that during a PLP instruction the disable interrupt flag randomly got changed to off (i.e. interrupts enabled) even when the P register had it set before the PLP and the value on the stack had it set.
I made a small change to the core to ignore the IRQ_n_o while LDP (load P from ALU signal) is high,during which time it is unstable.
... t65.vhd line 542 on
-- DOM HACK : PLP causes Flag_I to follow ALU_Q during LDP, ignore until
-- LDP is low, otherwise get spurious irq cycles during PLP even if
-- I is set before and after PLP!
elsif IRQ_n_o = '0' and P(Flag_I) = '0' and LDP = '0' then
IRQCycle <= '1';
end if;
Seems to work ok but I'm not clear why nobody else has run into this one or is it some timing thing I'm doing?
Sunday 23 March 2014
Carb rebuilt
Finished off rebuilding the Carburetor today and fitted to the intake manifold. Took a bit of faffing to get the float level right...until I realised that I'd left out the thick spacer washer on the needle valve assembly.
Hopefully it will all work when I try it but that is going to be a while away yet. I'd hoped that I'd be driving to Le Mans in it last year, at this rate it might be ready for June 2015...
Hopefully it will all work when I try it but that is going to be a while away yet. I'd hoped that I'd be driving to Le Mans in it last year, at this rate it might be ready for June 2015...
Tuesday 11 March 2014
Brrrrrr--beep!
Ok, so it doesn't really make a noise but after having hacked the MOS rom and fixed some address decoding issues I can now boot to a BASIC / BBC Micro Mode 0 prompt. No keyboard yet so I can't talk to it.
Sunday 9 March 2014
hdmi+6502
I've now got a functioning 6502 system hooked together with a hdmi graphics card - all running on the FPGA.
This has 32k RAM, 32k ROM, an LCD display, an HDMI display (like a BBC mode 0 640x256x1bpp bitmapped in8x80x32. Uses the r6502_tc core running at 25MHz (could go faster) and a little test ROM I hacked up to give it some exercise.
Next up will be either to hack together a MOS rom and BBC basic and a keyboard adaptor (maybe via the Raspberry pi for now) or alternatively I might take an existing BBC micro system and graft on HDMI...not sure yet...I just like writing 6502 code...
This has 32k RAM, 32k ROM, an LCD display, an HDMI display (like a BBC mode 0 640x256x1bpp bitmapped in8x80x32. Uses the r6502_tc core running at 25MHz (could go faster) and a little test ROM I hacked up to give it some exercise.
Next up will be either to hack together a MOS rom and BBC basic and a keyboard adaptor (maybe via the Raspberry pi for now) or alternatively I might take an existing BBC micro system and graft on HDMI...not sure yet...I just like writing 6502 code...
Monday 3 March 2014
My first graphics card....well my second
A bit more poking around this evening has now got it accessing on-chip RAM. It's pretty simple (and ropey) but it works. Shown is a screen dump from a BBC Micro loaded into memory as a .HEX file and a bit of colour at the bottom. Next up, I'll be going through some of the BBC Micro implementations on the net and pick out my favourite (looking like Mike Stirling's at present) to hack together a full BBC / HDMI on a DE0.
One thing I've discovered in the past few days is that most computer monitors (as opposed to TV's) won't support the normal SD modes i.e. 576i, which is what I was hoping for, as that would allow me to use the original 6845 timings to drive the DVI/HDMI. Looks like that's out though as my monitor requires a line rate of at least 30kHz and a frame rate of over 50Hz. The first obstacle can be avoided by buffering a line of video output at 15625Hz and outputting it twice. The second is a bit more tricky. I'm either going to have to buffer the entire frame and output at 60Hz (yuck - this will lead to gittery looking games) or maybe just cheat by running the BBC's master clock at 33Mhz instead of 32!
This is now my second attempt at a graphics card. The first one was a real hardware project, not just fpga but was a little less powerful at 32x48 pixels!
One thing I've discovered in the past few days is that most computer monitors (as opposed to TV's) won't support the normal SD modes i.e. 576i, which is what I was hoping for, as that would allow me to use the original 6845 timings to drive the DVI/HDMI. Looks like that's out though as my monitor requires a line rate of at least 30kHz and a frame rate of over 50Hz. The first obstacle can be avoided by buffering a line of video output at 15625Hz and outputting it twice. The second is a bit more tricky. I'm either going to have to buffer the entire frame and output at 60Hz (yuck - this will lead to gittery looking games) or maybe just cheat by running the BBC's master clock at 33Mhz instead of 32!
This is now my second attempt at a graphics card. The first one was a real hardware project, not just fpga but was a little less powerful at 32x48 pixels!
Sunday 2 March 2014
More HDMI, problems and glitches
After a bit more messing I discovered that the cable positioning was quite critical - move it about and it would drop out, flash or go out altogether. So, I decided I'd have a go at making a shorter / neater lash up...this time I cut up some jump cables with 1" pig tails and soldered them onto the wires in the hdmi cable. This looked much neater but didn't work...not a sausage. Whatever I did I couldn't make it work again. I checked and rechecked tested every connection, checked all my assignments in Quartus. Still nowt!
This is what my (slightly neater) lash up looked like after I'd half taken it to pieces again!
So, off for dinner and an hour of being patronised by some vacuous documentary on BBC Four led to a brain wave. I'd noticed earlier that the closest sign of life I'd had was when I made the clock leads longer and put a loop in them (by using a pair of jump leads). There must be a problem with the timing of the clock vs the blue/red/green signals? I decided I'd do a gate-level simulation and there it was looking me in the face. All four TDMS signals had glitches on them. My half-baked attempt at making a double data rate output latch with a pair of latches and a mux was not doing what it should. Also, that would explain why with a crappier higher inductance cable setup it was working...the glitches were being filtered out! So a bit more hunting and I found Altera's cousin of the Xilinx ODDR2 component. It's an ALTDDIO_OUT and only requires a single clock but outputs on rising and falling edges, instead of a pair of anti-phase clocks.
I was now getting a cleaner signal in the simulation but still no joy in getting a picture on screen....another hour of head-scratching and poking with my battery, resistor, led circuit tester finally told me another thing I'd not spotted...the HDMI cable has nice colour coded wire pairs. Unfortunately, the blue and gree pairs are swapped! Once I'd worked this out the picture popped straight back up on screen and now it is totally glitch free.
A bit more messing around in VHDL to make some colour bars and try and get my head round how the original code's registered signals thing was working and here's the result:
This is what my (slightly neater) lash up looked like after I'd half taken it to pieces again!
I was now getting a cleaner signal in the simulation but still no joy in getting a picture on screen....another hour of head-scratching and poking with my battery, resistor, led circuit tester finally told me another thing I'd not spotted...the HDMI cable has nice colour coded wire pairs. Unfortunately, the blue and gree pairs are swapped! Once I'd worked this out the picture popped straight back up on screen and now it is totally glitch free.
A bit more messing around in VHDL to make some colour bars and try and get my head round how the original code's registered signals thing was working and here's the result:
Saturday 1 March 2014
HDMI output from a DE0 nano
I've recently been trying to learn VHDL after a lot of playing around with pretty basic stuff I've decided to set myself the goal of making a 16-bit 65816 computer in VHDL. This will be loosely based on a BBC Micro with a 65816 processor, lots of RAM and better graphics than the original. A kind of imagining of what might have been if Acorn hadn't made the leap straight to 32 bits from 8!
The other project I've been toying with is a HDMI to 405 line system A converter.
I've downloaded a few 6502 cores from IPCores and had a play and got one working at 50MHz...I'd really like to find / make one that will do a decent cycle accurate 65816 but not found one yet....so looks like I need to make my own.
Anyway I digress, one of the aims of the project will be to try and get it working on a DE0nano with a minimum of interfacing. I'd really like to be able to generate HDMI directly from the chip. This isn't really possible as the chip on the DE0 nano (a Cyclone IV) doesn't have HDMI compatible outputs. However I've seen elsewhere that people have managed to drive HDMI/DVI with LVDS ports and the Cyclone IV does have enough of these.
I've never done anything with digital video before so I thought I'd have a look round for other people's stuff to hack at. I found this on hamsterworks which seemed as good a starting point as any. This was written for a Xilinx part and uses a few things not available on the Cyclone. Mainly the clock manager and an ODDR2 output buffer.
For my first hackaday attempt I've used one of the Cyclone's PLLs to create a 25MHz pixel clock and a pair of 125MHz TMDS bit clocks (only one of these is used at present). I've also knocked together a quick n dirty ODDR2 substitute. This isn't a proper job as it ignores the second clock, it just latches both values on the rising edge of the first clock and muxes the two latched values based on whether the clock is high or low. The code for the Quartus project can be downloaded here - the code provided as is and no guarantees.
To interface the hdmi cable to the DE0 nano I should probably have worried about sheilding, lead lengths, voltage / current translations and all that stuff but I didn't bother, I just cut a HDMI lead in two and used a pile of clip probes and wires to connect up....surprisingly after a bit of wire-wiggling it worked!
The next job will be to make some better shielded leads, this set up is pretty ropey and if the clock leads aren't just so all sorts of weird patterning starts to appear, also the picture disappears if a text message comes through on my phone!
The other project I've been toying with is a HDMI to 405 line system A converter.
I've downloaded a few 6502 cores from IPCores and had a play and got one working at 50MHz...I'd really like to find / make one that will do a decent cycle accurate 65816 but not found one yet....so looks like I need to make my own.
Anyway I digress, one of the aims of the project will be to try and get it working on a DE0nano with a minimum of interfacing. I'd really like to be able to generate HDMI directly from the chip. This isn't really possible as the chip on the DE0 nano (a Cyclone IV) doesn't have HDMI compatible outputs. However I've seen elsewhere that people have managed to drive HDMI/DVI with LVDS ports and the Cyclone IV does have enough of these.
I've never done anything with digital video before so I thought I'd have a look round for other people's stuff to hack at. I found this on hamsterworks which seemed as good a starting point as any. This was written for a Xilinx part and uses a few things not available on the Cyclone. Mainly the clock manager and an ODDR2 output buffer.
For my first hackaday attempt I've used one of the Cyclone's PLLs to create a 25MHz pixel clock and a pair of 125MHz TMDS bit clocks (only one of these is used at present). I've also knocked together a quick n dirty ODDR2 substitute. This isn't a proper job as it ignores the second clock, it just latches both values on the rising edge of the first clock and muxes the two latched values based on whether the clock is high or low. The code for the Quartus project can be downloaded here - the code provided as is and no guarantees.
14-segment starburst display. Font included!
Recently as part of an FPGA project I got hold of some 14-segment (Kingbright PDC54-11EWA)m starburst displays from ebay . I got 8 (sixteen characters) though as usual I only had a vague idea of what to do with them. In the end I got round to doing something with one of them. I've wired it up to a Matrix Multimedia eblocks eb-009 dev board and hacked together a quick test routine in a pic16LF877A.
As soon as I started to program for this I realised I'd need a font file to map the ascii values to bit patterns that turn on the segments of the display. I had a hunt round on the internet and found a few TruType and other fonts but only one place that mentioned an actual file for generating the bit patterns and he wanted cash! So I bit the bullet and threw together a quick and dirty font generator web page which helped me to make a C file containing the bit patterns for 32-127 ascii characters.
You can download and use the code generator here. It's pretty simple: enter a hexadecimal code in the text box and the display that will be generated is shown as a picture. Unzip to your drive and open the .htm file in your browser (you need to click "allow blocked content in IE). The usual disclaimers apply to this file, use at your own risk, not guaranteed to work, may cause dandruff and vomiting. This assumes that the bits of your display are in the same order as the a-q labelled segments on the datasheet with "a" the LSB and the dp the 15th bit. The screen-shot below shows and example.
I went through each ascii character and made an entry for each by hand - my font is fairly good for most of the uppercase and symbol characters but maybe a little weird for some of the lowercase characters which have to be frigged a bit to get them to work with the segments.
The code for a the quick PIC project can be downloaded here. The segments are mapped to PORTD for segments a-h LSB first and PORTB for segments j-q on PORTB. Bit 0 of PORTA selects between digit 0 and 1 and makes a quick scrolly message and then runs through the letters and symbols. The font file (probably the most useful part is in font14.c) which is a C array of the mappings for characters 32-127 ascii.
As soon as I started to program for this I realised I'd need a font file to map the ascii values to bit patterns that turn on the segments of the display. I had a hunt round on the internet and found a few TruType and other fonts but only one place that mentioned an actual file for generating the bit patterns and he wanted cash! So I bit the bullet and threw together a quick and dirty font generator web page which helped me to make a C file containing the bit patterns for 32-127 ascii characters.
You can download and use the code generator here. It's pretty simple: enter a hexadecimal code in the text box and the display that will be generated is shown as a picture. Unzip to your drive and open the .htm file in your browser (you need to click "allow blocked content in IE). The usual disclaimers apply to this file, use at your own risk, not guaranteed to work, may cause dandruff and vomiting. This assumes that the bits of your display are in the same order as the a-q labelled segments on the datasheet with "a" the LSB and the dp the 15th bit. The screen-shot below shows and example.
The code for a the quick PIC project can be downloaded here. The segments are mapped to PORTD for segments a-h LSB first and PORTB for segments j-q on PORTB. Bit 0 of PORTA selects between digit 0 and 1 and makes a quick scrolly message and then runs through the letters and symbols. The font file (probably the most useful part is in font14.c) which is a C array of the mappings for characters 32-127 ascii.
New blog for random bits and bobs
It's been a while since I posted anything on my other blogs Z80 homebrew and DDS-60 sig gen
however I've not been entirely dormant. I've made plenty of projects, very few finished but sometimes maybe containing something of interest to others. From now on I'll try and post stuff up here in the hope that it maybe of interest to other people and also so that I remember what I've been up to...There's no real theme here other than stuff that interests me...
however I've not been entirely dormant. I've made plenty of projects, very few finished but sometimes maybe containing something of interest to others. From now on I'll try and post stuff up here in the hope that it maybe of interest to other people and also so that I remember what I've been up to...There's no real theme here other than stuff that interests me...
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